The Dual-Core IntelŪ ItaniumŪ 2 Processor 9000 Sequence processor supports the intrinsics listed in the table below. These intrinsics are also compatible with the Microsoft compiler. These intrinsics each generate ItaniumŪ instructions. The second alpha-numerical chain in the intrinsic name represents the Itanium instruction the intrinsic generates. For example, the intrinsic _int64_cmp8xchg generates the cmp8xchg Itanium instruction. For more information about the Itanium instructions that these intrinsics generate, see the Intel Itanium Architecture Software Developer Manual, Volume 3: Instruction Set Reference.
For detailed information about an intrinsic, click on that intrinsic name in the following table.
| Intrinsic Name | Operation | Corresponding Itanium Instruction |
|---|---|---|
| _InterlockedCompare64Exchange128 | Compare and exchange | |
| _InterlockedCompare64Exchange128_acq | Compare and Exchange | |
| _InterlockedCompare64Exchange128_rel | Compare and Exchange | |
| __load128 | Read | |
| __load128_acq | Read | |
| __store128 | Store | |
| __store128_rel | Store |
__int64 _InterlockedCompare64Exchange128( __int64 volatile * <Destination>, __int64 <ExchangeHigh>, __int64 <ExchangeLow>, __int64 <Comperand>)
Generates a compare and exchange Itanium instruction.
Returns the lowest 64-bit value of the destination.
The following table describes each argument for this intrinsic.
| Destination | ExchangeHigh | ExchangeLow | Comperand |
|---|---|---|---|
| Pointer to the 128-bit Destination value | Highest 64 bits of the Exchange value | Lowest 64 bits of the Exchange value | Value to compare with Destination |
__int64 _InterlockedCompare64Exchange128_acq( __int64 volatile * <Destination>, __int64 <ExchangeHigh>, __int64 <ExchangeLow>, __int64 <Comperand>)
Generates a compare and exchange Itanium instruction. Same as _InterlockedCompare64Exchange128, but this intrinsic uses acquire semantics.
Returns the lowest 64-bit value of the destination.
The following table describes each argument for this intrinsic.
| Destination | ExchangeHigh | ExchangeLow | Comperand |
|---|---|---|---|
| Pointer to the 128-bit Destination value | Highest 64 bits of the Exchange value | Lowest 64 bits of the Exchange value | Value to compare with Destination |
__int64 _InterlockedCompare64Exchange128_rel( __int64 volatile * <Destination>, __int64 <ExchangeHigh>, __int64 <ExchangeLow>, __int64 <Comperand>
Generates a compare and exchange Itanium instruction. Same as _InterlockedCompare64Exchange128, but this intrinsic uses release semantics.
Returns the lowest 64-bit value of the destination.
The following table describes each argument for this intrinsic.
| Destination | ExchangeHigh | ExchangeLow | Comperand |
|---|---|---|---|
| Pointer to the 128-bit Destination value | Highest 64 bits of the Exchange value | Lowest 64 bits of the Exchange value | Value to compare with Destination |
__int64 __load128( __int64 volatile * Source, __int64 *<DestinationHigh>)
Generates the Itanium instruction that atomically reads 128 bits from the memory location.
Returns the lowest 64-bit value of the 128-bit loaded value.
The following table describes each argument for this intrinsic.
| Source | DestinationHigh |
|---|---|
| Pointer to the 128-bit Source value | Pointer to the location in memory that stores the highest 64 bits of the 128-bit loaded value |
__int64 __load128_acq( __int64 volatile * <Source>, __int64 *<DestinationHigh>
Generates the Itanium instruction that atomically reads 128 bits from the memory location. Same as __load128, but the this intrinsic uses acquire semantics.
Returns the lowest 64-bit value of the 128-bit loaded value.
The following table describes each argument for this intrinsic.
| Source | DestinationHigh |
|---|---|
| Pointer to the 128-bit Source value | Pointer to the location in memory that stores the highest 64 bits of the 128-bit loaded value |
__void __store128( __int64 volatile * <Destination>, __int64 <SourceHigh> __int64 <SourceLow>)
Generates the Itanium instruction that atomically stores 128 bits at the destination memory location.
No returns.
| Destination | SourceHigh | SourceLow |
|---|---|---|
| Pointer to the 128-bit Destination value | The highest 64 bits of the value to be stored | The lowest 64 bits of the value to be stored |
__void __store128_rel( __int64 volatile * <Destination>, __int64 <SourceHigh> __int64 <SourceLow>)
Generates the Itanium instruction that atomically stores 128 bits at the destination memory location. Same as __store128, but this intrinsic uses release semantics.
No returns.
| Destination | SourceHigh | SourceLow |
|---|---|---|
| Pointer to the 128-bit Destination value | The highest 64 bits of the value to be stored | The lowest 64 bits of the value to be stored |